Temporal Logic Specification and Analysis for Model Transformations
نویسندگان
چکیده
In this paper we outline an approach for using temporal logic specifications and model-checking tools to express and verify model transformation properties. Linear Temporal Logic (LTL) is used to express transformation semantics, and the SMV formalism is used to encode this semantics and to perform model checking.
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تاریخ انتشار 2015